EXCEPTION PROCESSING STATE (INTERRUPT PROCESSING)
MOTOROLA PROCESSING STATES 7 - 27
ii1
ii2
MAIN
PROGRAM
MEMORY
n1
INTERRUPT SYNCHRONIZED
AND RECOGNIZED
AS PENDING
ADDITIONAL INTERRUPTS
DISABLED DURING
FAST INTERRUPT
INTERRUPTS
RE-ENABLED
ii = INTERRUPT INSTRUCTION
n = NORMAL INSTRUCTION
n2
n3
n4
INTERRUPT CONTROL CYCLE 1 i
INTERRUPT CONTROL CYCLE 2 i
FETCH n1 n2 ii1 ii2 n3 n4
DECODE n1 n2 ii1 ii2 n3 n4
EXECUTE n1 n2 ii1 ii2 n3 n4
INSTRUCTION CYCLE COUNT 123456 78
i = INTERRUPT
ii = INTERRUPT INSTRUCTION WORD
n = NORMAL INSTRUCTION WORD
INTERRUPT SYNCHRONIZED AND
RECOGNIZED AS PENDING
INTERRUPTS RE-ENABLED
(a) Instruction Fetches from Memory
(b) Program Controller Pipeline
Figure 7-8 Fast Interrupt Service Routine