EXCEPTION PROCESSING STATE (INTERRUPT PROCESSING)
7 - 30 PROCESSING STATES MOTOROLAFigure 7-10 Long Interrupt Service Routine
EXPLICIT
RETURN FROM
INTERRUPT
(SHOULD BE RTI)
ii1
ii2
MAIN
PROGRAM
FETCHES
n1
INTERRUPT
SYNCHRONIZED
AND RECOGNIZED
AS PENDING
JSR CAN BE IN EITHER LOCATION
TO FORM A LONG INTERRUPT
n2
n3
n4 ii3
ii4
INTERRUPT
ROUTINE
ii7
RTI
LONG INTERRUPT
SERVICE ROUTINE FETCHES
(STARTS WITH A FAST INTERRUPT)
PROGRAM COUNTER
RESUMES OPERATION
INTERRUPTS
RE-ENABLED
(a) Instruction Fetches from Memory
(b) Program Controller Pipeline
INTERRUPT CONTROL CYCLE 1 i
INTERRUPT CONTROL CYCLE 2 i
FETCH n1 n2 ii1 ii2 ii3 ii4 ii5 ii6 ii7 RTI — n3 n4
DECODE n1 n2 ii1 ii2 ii3 ii4 ii5 ii6 ii7 RTI NOP n3 n4
EXECUTE n1 n2 ii1 ii2 ii3 ii4 ii5 ii6 ii7 RTI NOP n3 n4
INSTRUCTION CYCLE COUNT 1234567 8 9101112131415
i = INTERRUPT
ii = INTERRUPT INSTRUCTION WORD
n = NORMAL INSTRUCTION WORD
INTERRUPT SYNCHRONIZED AND
RECOGNIZED AS PENDING
INTERRUPTS RE-ENABLED