Motorola DSP56000, 24-Bit Digital Signal Processor manual Instruction Fields S1∗S2 Sign

INSTRUCTION DESCRIPTIONS

MAC

Signed Multiply-Accumulate

MAC

Condition Codes:

15	14	13	12	11		10	9		8	7	6	5	4	3	2	1		0
LF	DM	T	**		S1	S0		I1	I0	S	L	E	U	N	Z		V	C
				MR									CCR

S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION. L — Set if limiting (parallel move) or overflow has occurred in result

E — Set if the signed integer portion of A or B result is in use U — Set if A or B result is unnormalized

N — Set if bit 55 of A or B result is set Z— Set if A or B result equals zero

V — Set if overflow has occurred in A or B result

Note: The definitions of the E and U bits vary according to the scaling mode being used. Refer to Section A.5 for complete details.

Instruction Format 1:

MAC (±)S1,S2,D

MAC (±)S2,S1,D

Opcode: 1

	23						8	7		4	3	0
				DATA BUS MOVE FIELD					1	Q Q Q	d k	1 0
						OPTIONAL EFFECTIVE ADDRESS EXTENSION
Instruction Fields:
S1∗S2		Q	Q		Q	Sign	k	D		d
X0 X0		0	0		0	+	0	A		0
Y0 Y0		0	0		1	–	1	B		1
X1 X0		0	1		0
Y1 Y0		0	1		1
X0 Y1		1	0		0
Y0 X0		1	0		1
X1 Y0		1	1		0
Y1 X1		1	1		1

Note: Only the indicated S1∗S2 combinations are valid. X1∗X1 and Y1∗Y1 are not valid.

MOTOROLA INSTRUCTION SET DETAILS A - 151