Motorola 24-Bit Digital Signal Processor, DSP56000 manual Illegal Instruction Interrupt

INSTRUCTION DESCRIPTIONS

	ILLEGAL	Illegal Instruction Interrupt	ILLEGAL
Operation:		Assembler Syntax:
	Begin Illegal Instruction	ILLEGAL
	exception processing

Description: The ILLEGAL instruction is executed as if it were a NOP instruction. Nor- mal instruction execution is suspended and illegal instruction exception processing is ini- tiated. The interrupt vector address is located at address P:$3E. The interrupt priority level (I1, I0) is set to 3 in the status register if a long interrupt service routine is used. The purpose of the ILLEGAL instruction is to force the DSP into an illegal instruction excep- tion for test purposes. If a fast interrupt is used with the ILLEGAL instruction, an infinite loop will be formed (an illegal instruction interrupt normally returns to the illegal instruc- tion) which can only be broken by a hardware reset. Therefore, only long interrupts should be used. Exiting an illegal instruction is a fatal error. The long exception routine should indicate this condition and cause the system to be restarted.

If the ILLEGAL instruction is in a DO loop at LA and the instruction at LA–1 is being inter- rupted, then LC will be decremented twice due to the same mechanism that causes LC to be decremented twice if JSR, REP, etc. are located at LA. This is why JSR, REP, etc. at LA are restricted. Clearly restrictions cannot be imposed on illegal instructions.

Since REP is uninterruptable, repeating an ILLEGAL instruction results in the interrupt not being initiated until after completion of the REP. After servicing the interrupt, program control will return to the address of the second word following the ILLEGAL instruction. Of course, the ILLEGAL interrupt service routine should abort further processing, and the processor should be reinitialized.

Example:

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ILLEGAL;begin ILLEGAL exception processing

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Explanation of Example: The ILLEGAL instruction suspends normal instruction execu- tion and initiates ILLEGAL exception processing.

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