Motorola 24-Bit Digital Signal Processor, DSP56000 manual Test Accumulator, Tst

INSTRUCTION DESCRIPTIONS

	TST	Test Accumulator	TST
Operation:		Assembler Syntax:
	S–0 (parallel move)	TST	S (parallel move)

Description: Compare the specified source accumulator S with zero and set the condi- tion codes accordingly. No result is stored although the condition codes are updated.

Example:

:
TST A #$345678,B	;set CCR bits for value in A, update B

:

A

Before Execution

$01:020304:000000

A

After Execution

$01:020304:000000

CCR

$0300

CCR

$0330

Explanation of Example: Prior to execution, the 56-bit A accumulator contains the value $01:020304:000000, and the 16-bit condition code register contains the value $0300. The execution of the TST A instruction compares the value in the A register with zero and updates the condition code register accordingly. The contents of the A accumu- lator are not affected.

Condition Codes:

15	14	13	12	11		10	9		8	7	6	5	4	3		2	1		0
LF	DM	T	**		S1	S0		I1	I0	S	L	E	U		N	Z		V	C
				MR										CCR

S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION L — Set if data limiting has occurred during parallel move

E — Set if the signed integer portion of A or B result is in use

U — Set if A or B result is unnormalized

N — Set if bit 55 of A or B result is set

Z — Set if A or B result equals zero

V — Always cleared

Note: The definitions of the E and U bits vary according to the scaling mode being used. Refer to Section A.5 CONDITION CODE COMPUTATION for complete details.

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