Motorola 24-Bit Digital Signal Processor, DSP56000 manual Address Register Indirect Predecrement

ADDRESSING

EXAMPLE: MOVE X: –(R5),B1

			BEFORE EXECUTION
B2			B1			B0
55	48	47	24	23					0
3 B		B 6 2 D 0 4		A 5 5 4 C 0
7	0	23	0	23					0
				23	X MEMORY				0
			$3007	$	A B	C	D	E	F
			$3006
				$	1 2	3	4	5	6

150

R5 $3007

150

N5 XXXX

150

M5 $FFFF

Assembler Syntax: –Rn

Memory Spaces: P:, X:, Y:, L:

Additional Instruction Execution Time (Clocks): 2

Additional Effective Address Words: 0

			AFTER EXECUTION
B2			B1				B0
55	48	47	24	23		0
3 B		1 2 3 4 5 6			A 5 5 4 C 0
7	0	23	0	23		0
						X MEMORY
				23		0

$3007 $ A B C D E F

$3006	$	1	2	3	4 5	6
			15			0
		R5			$3006
			15			0
		N5			XXXX
			15			0
		M5			$FFFF

Figure 4-10 Address Register Indirect — Predecrement

DSP56K. The MMMM column indicates the hex value which should be stored in the Mn register.

4.4.2.1Linear Modifier (Mn=$FFFF)

When the value in the modifier register is $FFFF, address modification is performed using normal 16-bit linear arithmetic (see Table 4-2). A 16-bit offset, Nn, and + 1 or –1 can be used in the address calculations. The range of values can be considered as signed (Nn from –32,768 to + 32,767) or unsigned (Nn from 0 to + 65,535) since there is no arithmetic

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