Motorola DSP56000, 24-Bit Digital Signal Processor manual Sbc

INSTRUCTION DESCRIPTIONS

SBC

Subtract Long with Carry

SBC

Explanation of Example: This example illustrates long-word double-precision (96-bit) subtraction using the SBC instruction. Prior to execution of the SUB and SBC instruc- tions, the 96-bit value $000000:000001:800000:000000 is loaded into the Y and X regis- ters (X:Y), respectively. The other double-precision 96-bit value $000000:000003:000000:000000 is loaded into the B and A accumulators (B:A), respec- tively. Since the 48-bit value loaded into the A accumulator is automatically sign extended to 56 bits and the other 48-bit long-word operand is internally sign extended to 56 bits during instruction execution, the carry bit will be set correctly after the execution of the SUB X,A instruction. The SBC Y,B instruction then produces the correct MS 56-bit result. The actual 96-bit result is stored in memory using the A10 and B10 operands (instead of A and B) because shifting and limiting is not desired.

MOTOROLA INSTRUCTION SET DETAILS A - 271