NORMAL PROCESSING STATE

The DO instruction is another instruction that begins execution during the decode cycle of the pipeline. As a result, there are a number of restrictions concerning access conten- tion with the program controller registers accessed by the DO instruction. The ENDDO instruction has similar restrictions. APPENDIX A - INSTRUCTION SET DETAILS con- tains additional information on the DO and ENDDO instruction restrictions.

Case 5: A resource contention problem can occur when one instruction is using a register during its decode while the instruction executing is accessing the same resource. One ex- ample of this is as follows:

MOVEC

X:$100,SSH

DO

#$10,END

The problem occurs because the MOVEC instruction loads the contents of X:$100 into the system stack high (SSH) during its execution cycle. The DO instruction that follows pushes the stack (LA SSH, LC SSL) during its decode cycle. Therefore, the two instructions try writing to the SSH simultaneously and conflict.

7.2.2 Summary of Pipeline-Related Restrictions

The following paragraphs give a summary of the instruction sequences that cause pipe- line effects. Additional information about the individual instructions can be found in

APPENDIX A - INSTRUCTION SET DETAILS.

DO instruction restrictions:

The DO instruction must not be immediately preceded by any of the following instruc- tions:

BCHG/BCLR/BSET LA, LC, SSH, SSL, or SP

MOVEC/MOVEM to LA, LC, SSH, SSL, or SP

MOVEC/MOVEM from SSH

The DO instruction cannot specify SSH as a source register, as in the following example:

DO SSH,xxxx

Restrictions near the end of DO loops:

Proper DO loop operation is guaranteed if no instruction starting at address LA-2, LA-1, or LA specifies the program controller registers SR, SP, SSL, LA, LC, or (implicitly) PC as a destination register, or specifies SSH as a source or a destination register.

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PROCESSING STATES

MOTOROLA

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Motorola 24-Bit Digital Signal Processor, DSP56000 Summary of Pipeline-Related Restrictions, Do instruction restrictions