Motorola 24-Bit Digital Signal Processor, DSP56000 Arithmetic Shift Accumulator Left, Operation

INSTRUCTION DESCRIPTIONS

ASL

Arithmetic Shift Accumulator Left

ASL

	55	47	23	0
Operation:	C

0 (parallel move)

Assembler Syntax: ASL D (parallel move)

Description: Arithmetically shift the destination operand D one bit to the left and store the result in the destination accumulator. The MS bit of D prior to instruction execution is shifted into the carry bit C and a zero is shifted into the LS bit of the destination accumu- lator D. If a zero shift count is specified, the carry bit is cleared. The difference between ASL and LSL is that ASL operates on the entire 56 bits of the accumulator and therefore sets the V bit if the number overflowed.

Example:

:

ASL A (R3)– ;multiply A by 2, update R3

:

A

Before Execution

$A5:012345:012345

A

After Execution

$4A:02468A:02468A

SR

$0300

SR

$0373

Explanation of Example: Prior to execution, the 56-bit A accumulator contains the value $A5:012345:012345. The execution of the ASL A instruction shifts the 56-bit value in the A accumulator one bit to the left and stores the result back in the A accumulator.

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