INSTRUCTION DESCRIPTIONS

 

R:Y

Register and Y Memory Data Move

R:Y

Class II Instruction Format:

 

 

 

 

 

 

( . . . . . ) Y0 A A Y:ea

 

 

 

 

 

 

( . . . . . ) Y0 B B Y:ea

 

 

 

 

 

 

Opcode:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23

16

15

8

7

0

 

 

 

 

 

0 0 0 0 1

0 0 d

1 0 M

M M R R R

INSTRUCTION OPCODE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OPTIONAL EFFECTIVE ADDRESS EXTENSION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instruction Fields:

ea=6-bit Effective Address=MMMRRR

Effective

Addressing Mode

M M M R R R

(Rn)-Nn

0

0

0

r

r

r

(Rn)+Nn

0

0

1

r

r

r

(Rn)-

0

1

0

r

r

r

(Rn)+

0

1

1

r

r

r

(Rn)

1

0

0

r

r

r

(Rn+Nn)

1

0

1

r

r

r

-(Rn)

1

1

1

r

r

r

where “rrr” refers to an address register R0–R7

 

 

 

SRC

DEST

DEST

 

 

 

S, D

S/L

Sign Ext

Zero

d

MOVE Opcode

X0

no

N/A

N/A

0

Y0 A

A Y:ea

Y0

no

N/A

N/A

1

Y0 B

B Y:ea

A

yes

A2

A0

 

 

 

B

yes

B2

B0

 

 

 

Timing: mv oscillator clock cycles

Memory: mv program words

MOTOROLA

INSTRUCTION SET DETAILS

A - 197

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Motorola DSP56000, 24-Bit Digital Signal Processor manual Register and Y Memory Data Move Class II Instruction Format, Dest