Motorola 24-Bit Digital Signal Processor, DSP56000 manual Add

INSTRUCTION DESCRIPTIONS

ADD

Add

ADD

Operation:	Assembler Syntax:
S+D➞D (parallel move	ADD S,D (parallel move)

Description: Add the source operand S to the destination operand D and store the result in the destination accumulator. Words (24 bits), long words (48 bits), and accumu- lators (56 bits) may be added to the destination accumulator.

Note: The carry bit is set correctly using word or long-word source operands if the ex- tension register of the destination accumulator (A2 or B2) is the sign extension of bit 47 of the destination accumulator (A or B). Thus, the carry bit is always set correctly using accumulator source operands, but can be set incorrectly if A1, B1, A10, or B10 are used as source operands and A2 and B2 are not replicas of bit 47.

Example:

:

ADD X0,A A,X1 A,Y:(R1)+l ;24-bit add, set up X1, save prev. result

:

X0

Before Execution

$FFFFFF

X0

After Execution

$FFFFFF

A

$00:000100:000000

A

$00:0000FF:000000

Explanation of Example: Prior to execution, the 24-bit X0 register contains the value $FFFFFF and the 56-bit A accumulator contains the value $00:000100:000000. The ADD instruction automatically appends the 24-bit value in the X0 register with 24 LS zeros, sign extends the resulting 48-bit long word to 56 bits, and adds the result to the 56-bit A accumulator. Thus, 24-bit operands are added to the MSP portion of A or B (A1 or B1) because all arithmetic instructions assume a fractional, twos complement data representation. Note that 24-bit operands can be added to the LSP portion of A or B (A0 or B0) by loading the 24-bit operand into X0 or Y0, forming a 48-bit word by loading X1 or Y1 with the sign extension of X0 or Y0 and executing an ADD X,A or ADD Y,A instruc- tion.

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