SECTION CONTENTS

SECTION 3.1 DATA ARITHMETIC LOGIC UNIT

3

SECTION 3.2 OVERVIEW AND DATA ALU ARCHITECTURE

3

3.2.1 Data ALU Input Registers (X1, X0, Y1, Y0)

5

3.2.2 MAC and Logic Unit

6

3.2.3 Data ALU A and B Accumulators

7

3.2.4 Accumulator Shifter

9

3.2.5 Data Shifter/Limiter

9

3.2.5.1 Limiting (Saturation Arithmetic)

9

3.2.5.2 Scaling

10

SECTION 3.3 DATA REPRESENTATION AND ROUNDING

10

SECTION 3.4 DOUBLE PRECISION MULTIPLY MODE

16

SECTION 3.5 DATA ALU PROGRAMMING MODEL

19

SECTION 3.6 DATA ALU SUMMARY

19

3 - 2

DATA ARITHMETIC LOGIC UNIT

MOTOROLA

Page 35
Image 35
Motorola 24-Bit Digital Signal Processor, DSP56000 manual Data Arithmetic Logic Unit Motorola