Motorola 24-Bit Digital Signal Processor manual Signed Multiply-Accumulate, PLY Mode, MAC X0,X0,A

INSTRUCTION DESCRIPTIONS

MAC	Signed Multiply-Accumulate			MAC
Operation:		Assembler Syntax:
D±S1∗S2➞D (parallel move)		MAC	(±)S1,S2,D (parallel move)
D±S1∗S2➞D (parallel move)		MAC	(±)S2,S1,D (parallel move)
D±(S1∗2-n)➞D (no parallel move)		MAC	(±)S,#n,D (no parallel move)

Description: Multiply the two signed 24-bit source operands S1 and S2 (or the signed 24-bit source operand S by the positive 24-bit immediate operand 2-n) and add/subtract the product to/from the specified 56-bit destination accumulator D. The “–” sign option is used to negate the specified product prior to accumulation. The default sign option is “+”.

Note: When the processor is in the Double Precision Multiply Mode, the following instructions do not execute in the normal way and should only be used as part of the double precision multiply algorithm shown in Section 3.4 DOUBLE PRECISION MULTI-

PLY MODE:

MPY Y0, X0, A MAC X1, Y0, A MAC X0, Y1, A MAC Y1, X1, A

MPY Y0, X0, B MAC X1, Y0, B MAC X0, Y1, B MAC Y1, X1, B

All other Data ALU instructions are executed as NOP’s when the processor is in the Dou- ble Precision Multiply Mode.

Example 1:

:
MAC X0,X0,A	X:(R2)+N2,Y1	;square X0 and store in A, update Y1 and R2
:

X0

Before Execution

$123456

X0

After Execution

$123456

A

$00:100000:00000

A

$00:1296CD:9619C8

Explanation of Example 1: Prior to execution, the 24-bit X0 register contains the value of $123456 (0.142222166), and the 56-bit A accumulator contains the value $00:100000:000000 (0.125). The execution of the MAC X0,X0,A instruction squares the 24-bit signed value in the X0 register and adds the resulting 48-bit product to the 56-bit A accumulator (X0∗X0+lA=0.145227144519197 approximately= $00:1296CD:9619C8=A).

A - 150 INSTRUCTION SET DETAILS MOTOROLA