AGU ARCHITECTURE4 - 4 ADDRESS GENERATION UNIT
MOTOROLA
4.2.2 Offset Register Files (Nn) Each of two offset register files shown in Figure 4-2 consists of four 16-bit registers. Thetwo files contain offset registers N0 - N3 and N4 - N7, which contain either data or offsetvalues used to update address pointers. Each offset register can be read or written by the
CLOCK
GENERATOR
PERIPHERAL
PINS
INTERNAL
DATA
BUS
SWITCH
PROGRAM
RAM/ROM
EXPANSION
PROGRAM
INTERRUPT
CONTROLLER
PROGRAM
DECODE
CONTROLLER
PROGRAM
ADDRESS
GENERATOR
YAB
XAB
PAB
YDB
XDB
PDB
GDB
MODC/NMI
MODB/IRQB
RESET
DATA ALU
24X24+56→56-BIT MAC
TWO 56-BIT ACCUMULATORS
EXTERNAL
ADDRESS
BUS
SWITCH
BUS
CONTROL
EXTERNAL
DATA BU S
SWITCH
ADDRESS
DATA
16 BITS
24 BITS
PORT A
MODA/IRQA
PLL
X MEMORY
RAM/ROM
EXPANSION
Y MEMORY
RAM/ROM
EXPANSION
ADDRESS
GENERATION
UNIT
OnCE™
PERIPHERAL
MODULES
EXPANSION
AREA
CONTROL

24-Bit 56K

Module
Figure 4-1 DSP56K Block Diagram
Program Control Unit