OVERVIEW AND DATA ALU ARCHITECTURE

 

 

 

 

 

 

 

 

EXPANSION

 

 

 

 

 

 

 

 

 

 

AREA

 

 

 

 

PERIPHERAL

 

PROGRAM

 

X MEMORY

Y MEMORY

 

 

 

 

 

 

RAM/ROM

 

RAM/ROM

RAM/ROM

 

 

 

 

 

MODULES

 

 

 

 

 

PERIPHERAL PINS

 

 

EXPANSION

EXPANSION

EXPANSION

 

 

 

 

 

 

 

 

 

 

 

ADDRESS

 

YAB

 

 

EXTERNAL

ADDRESS

 

 

 

 

XAB

 

 

 

 

GENERATION

 

 

 

ADDRESS

 

 

 

PAB

 

 

 

24 Bit 56K

UNIT

 

 

 

BUS

 

 

 

 

 

 

 

Module

 

 

 

 

 

SWITCH

 

 

 

 

 

 

 

 

 

 

 

 

A

 

 

 

 

 

 

 

 

BUS

CONTROL

PORT

 

 

 

 

 

 

 

 

CONTROL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

YDB

 

 

 

 

 

 

INTERNAL

 

 

 

XDB

 

 

EXTERNAL

DATA

 

 

DATA

 

 

 

 

 

 

DATA BUS

 

 

BUS

 

 

 

PDB

 

 

SWITCH

 

 

SWITCH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GDB

 

 

 

 

 

 

PLL

 

 

 

 

DATA ALU

 

 

 

 

 

PROGRAM

PROGRAM

PROGRAM

 

 

 

 

 

 

 

24X24+5656-BIT MAC

OnCE™

 

 

 

CLOCK

INTERRUPT

DECODE

ADDRESS

 

 

 

 

CONTROLLER

CONTROLLER

GENERATOR

TWO 56-BIT ACCUMULATORS

 

 

 

 

 

 

 

GENERATOR

Program Control Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MODC/NMI

 

 

 

 

 

 

 

16 BITS

 

 

 

 

 

 

MODB/IRQB

 

24 BITS

 

 

 

 

 

 

 

 

 

 

 

MODA/IRQA

 

 

 

 

 

 

 

 

 

RESET

 

 

Figure 3-1 DSP56K Block Diagram

The following paragraphs describe each of these components and provide a description of data representation, rounding, and saturation arithmetic.

3 - 4

DATA ARITHMETIC LOGIC UNIT

MOTOROLA

Page 37
Image 37
Motorola 24-Bit Digital Signal Processor, DSP56000 manual DSP56K Block Diagram