Motorola DSP56000 manual Reading and Writing the ALU Extension Registers

INSTRUCTION FORMATS

23 8 7 0

BUS

REGISTER A2, B2 USED

AS A DESTINATION

REGISTER A2, B2 USED AS A SOURCE

	LSB OF
NOT USED	WORD

23	8 7	0
NOT USED		A2

REGISTER A2, B2

23	8 7		0
SIGN EXTENSION		CONTENTS		BUS
OF A2			OF A2

Figure 6-4 Reading and Writing the ALU Extension Registers

23 0

BUS

ADDRESS ALU REGISTERS
			LSB OF
	AS A DESTINATION	NOT USED	WORD

				15	0	ADDRESS ALU
ADDRESS ALU REGISTERS
						REGISTERS
	AS A SOURCE
23			16 15		0
		ZERO FILL				BUS

Figure 6-5 Reading and Writing the Address ALU Registers

6.3.2.2AGU Registers

The 24 AGU registers are 16 bits wide. They may be accessed as word operands for address, address modifier, and data storage. When used as a source operand, these reg- isters occupy the low-order portion of the 24-bit word; the high-order portion is read as zeros (see Figure 6-5). When used as a destination operand, these registers receive the low-order portion of the word; the high-order portion is not used. The notation “Rn” desig- nates one of the eight address registers, R0–R7; the notation “Nn” designates one of the eight address offset registers, N0–N7; and the notation “Mn” designates one of the eight

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