Motorola 24-Bit Digital Signal Processor, DSP56000 manual Hardware do Loop

INSTRUCTION GROUPS

START OF LOOP

1)SP+1 - SP; LA - SSH; LC - SSL; #xxx -LC 2)SP+1 - SP; PC - SSH; SR - SSL; Expr–1 - LA 3)1 - LF

END OF LOOP

1)SSL(LF) - SR

2)SP–1 - SP; SSH - LA; SSL - LC; SP–1 - SP 3)PC + 1 - PC

NOTE:

#xxx=Loop Count Number Expr=Expression

Figure 6-13 Hardware DO Loop

2.The stack is pushed again.

A.The SP is incremented.

B.The address of the first instruction in the program loop (PC) and the current SR contents are pushed onto the SS.

C.The LA register is initialized with the value specified in the DO instruction decremented by one.

3.The LF bit in the SR is set. The LF bit is set when a program loop is in progress and enables the end-of-loop detection.

The program loop continues execution until the program address fetched equals the LA register contents (last address of program loop). The contents of the LC are then tested for one. If the LC is not one, it is decremented, and the top location in the stack RAM is read (but not pulled) into the PC to return to the start of the loop. If the LC is one, the pro- gram loop is terminated by the following sequence:

1.Reading the previous LF bit from the top location in the SS into the SR

2.Purging the SS (pulling the top location and discarding the contents), pulling the LA and LC registers off the SS, and restoring the respective registers

3.Incrementing the PC

The LF bit (pulled from the SS when a loop is terminated) indicates if the terminated loop was a nested loop. Figure 6-14shows two DO loops, one nested inside the other. If the stack is managed to prevent a stack overflow, DO loops can be stacked indefinitely.

The ENDDO instruction is not used for normal termination of a DO loop; it is only used to terminate a DO loop before the LC has been decremented to one.

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