Motorola 24-Bit Digital Signal Processor, DSP56000 Memory Data Move Operation Assembler Syntax

INSTRUCTION DESCRIPTIONS

	X:		X Memory Data Move	X:
Operation:			Assembler Syntax:
(		); X:ea➞D	(	) X:ea,D
(		); X:aa➞D	(	) X:aa,D
(		); S➞X:ea	(	) S,X:ea
(		); S➞X:aa	(	) S,X:aa

( . . . . . ); #xxxxxx➞D( . . . . . ) #xxxxxx,D

where ( . . . . . ) refers to any arithmetic or logical instruction which allows parallel moves.

Description: Move the specified word operand from/to X memory. All memory address- ing modes, including absolute addressing and 24-bit immediate data, may be used. Absolute short addressing may also be used.

If the arithmetic or logical opcode-operand portion of the instruction specifies a given destination accumulator, that same accumulator or portion of that accumulator may not be specified as a destination D in the parallel data bus move operation. Thus, if the opcode-operand portion of the instruction specifies the 56-bit A accumulator as its desti- nation, the parallel data bus move portion of the instruction may not specify A0, A1, A2, or A as its destination D. Similarly, if the opcode-operand portion of the instruction speci- fies the 56-bit B accumulator as its destination, the parallel data bus move portion of the instruction may not specify B0, B1, B2, or B as its destination D. That is, duplicate des- tinations are NOT allowed within the same instruction.

If the opcode-operand portion of the instruction specifies a given source or destination register, that same register or portion of that register may be used as a source S in the parallel data bus move operation. This allows data to be moved in the same instruction in which it is being used as a source operand by a data ALU operation. That is, duplicate sources are allowed within the same instruction.

When a 24-bit source operand is moved into a 16-bit destination register, the 16 LS bits of the 24-bit source operand are stored in the 16-bit destination register. When a 16-bit source operand is moved into a 24-bit destination register, the 16 LS bits of the destina- tion register are loaded with the contents of the 16-bit source operand, and the eight MS bits of the 24-bit destination register are zeroed.

A - 174 INSTRUCTION SET DETAILS MOTOROLA