Motorola DSP56000, 24-Bit Digital Signal Processor manual Instruction Descriptions

INSTRUCTION DESCRIPTIONS

A.7 INSTRUCTION DESCRIPTIONS

The following section describes each instruction in the DSP56K instruction set in com- plete detail. The format of each instruction description is given in Section A.2. Instruc- tions which allow parallel moves include the notation “(parallel move)” in both the Assembler Syntax and the Operation fields. The example given with each instruction discusses the contents of all the registers and memory locations referenced by the opcode-operand portion of that instruction but not those referenced by the parallel move portion of that instruction. Refer to page A-160for a complete discussion of parallel moves, including examples which discuss the contents of all the registers and memory locations referenced by the parallel move portion of an instruction.

Note: Whenever an instruction uses an accumulator as both a destination operand for a data ALU operation and as a source for a parallel move operation, the parallel move operation occurs first and will use the data that exists in the accumulator before the exe- cution of the data ALU operation has occurred.

Whenever a bit in the condition code register is defined according to the standard defini- tion given in Section A.5, a brief definition will be given in normal text in the Condition Code section of that instruction description. Whenever a bit in the condition code register is defined according to a special definition for some particular instruction, the special definition of that bit will be given in the Condition Code section of that instruction in bold text to alert the user to any special conditions concerning its use.

The definition and thus the computation of both the E (extension) and U (unnormalized) bits of the condition code register (CCR) varies according to the scaling mode being used. Refer to Section A.5 for complete details.

Note: The signed integer portion of an accumulator is NOT necessarily the same as ei- ther the A2 or B2 extension register portion of that accumulator. The signed integer portion of an accumulator is defined according to the scaling mode being used and can consist of the MS 8, 9, or 10 bits of an accumulator. Refer to Section A.5 for complete details.

MOTOROLA INSTRUCTION SET DETAILS A - 21