INSTRUCTION DESCRIPTIONS
A - 240 INSTRUCTION SET DETAILS MOTOROLA
Operation: Assembler Syntax:
If E • U • Z=1, then ASL D and Rn–1➞Rn NORM Rn,D
else if E=1, then ASR D and Rn+1➞Rn
else NOP
where E denotes the logical complement of E, and
where • denotes the logical AND operator
Description: Perform one normalization iteration on the specified destination operand
D, update the specified address register Rn based upon the results of that iteration, and
store the result back in the destination accumulator. This is a 56-bit operation. If the
accumulator extension is not in use, the accumulator is unnormalized, and the accumu-
lator is not zero, the destination operand is arithmetically shifted one bit to the left, and
the specified address register is decremented by 1. If the accumulator extension register
is in use, the destination operand is arithmetically shifted one bit to the right, and the
specified address register is incremented by 1. If the accumulator is normalized or zero,
a NOP is executed and the specified address register is not affected. Since the operation
of the NORM instruction depends on the E, U, and Z condition code register bits, these
bits must correctly reflect the current state of the destination accumulator prior to execut-
ing the NORM instruction. Note that the L and V bits in the condition code register will be
cleared unless they have been improperly set up prior to executing the NORM instruc-
tion.
Example: :
REP #$2F ;maximum number of iterations needed
NORM R3,A ;perform 1 normalization iteration
:
Explanation of Example: Prior to execution, the 56-bit A accumulator contains the
value $00:000000:000001, and the 16-bit R3 address register contains the value $0000.
The repetition of the NORM R3,A instruction normalizes the value in the 56-bit accumu-
lator and stores the resulting number of shifts performed during that normalization pro-
NORM Normalize Accumulator Iteration NORM
Before Execution After Execution
A$00:000000:000001
R3 R3
$0000 $FFD2
$00:400000:000000
A