INSTRUCTION DESCRIPTIONS

BTST

Bit Test

Instruction Format:

BTST #n,X:ea

BTST #n,Y:ea

Opcode:

BTST

 

23

16

15

8

7

0

 

 

0

0 0 0 1 0 1 1

0 1 M M M R R R

0 S 1 b b b b b

 

 

 

 

 

 

 

 

 

 

 

OPTIONAL EFFECTIVE ADDRESS EXTENSION

 

 

 

 

 

 

 

 

 

 

Instruction Fields:

#n=bit number=bbbbb,

ea=6-bit Effective Address=MMMRRR

Effective

 

 

 

 

 

 

 

 

 

Addressing Mode

M M M R R R

Memory SpaceS

Bit Number bbbbb

(Rn)-Nn

0

0

0

r

r

r

X Memory

0

00000

(Rn)+Nn

0

0

1

r

r

r

Y Memory

1

(Rn)-

0

1

0

r

r

r

 

 

(Rn)+

0

1

1

r

r

r

 

 

(Rn)

1

0

0

r

r

r

 

 

10111

(Rn+Nn)

1

0

1

r

r

r

 

 

 

-(Rn)

1

1

1

r

r

r

 

 

 

Absolute address

1

1

0

0

0

0

 

 

 

where “rrr” refers to an address register R0-R7

Timing: 4+mvb oscillator clock cycles

Memory: 1+ea program words

A - 66

INSTRUCTION SET DETAILS

MOTOROLA

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Motorola 24-Bit Digital Signal Processor, DSP56000 manual Btst #n,Xea Btst #n,Yea