INSTRUCTION DESCRIPTIONS

JScc

Jump to Subroutine Conditionally

Instruction Format:

 

JScc

JScc ea

Opcode:

 

23

16

15

8

7

0

 

 

0

0 0 0 1 0 1 1

1 1 M M M R R R

1 0 1 0 C C C C

 

 

 

 

 

 

 

 

 

 

 

OPTIONAL EFFECTIVE ADDRESS EXTENSION

 

 

 

 

 

 

 

 

 

 

Instruction Fields:

cc=4-bit condition code=CCCC, ea=6-bit Effective Address=MMMRRR

Effective

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Addressing Mode M M M R R R

Mnemonic C C C C

Mnemonic C C C

C

(Rn)–Nn

0

0

0

r

r

r

CC (HS)

0

0

0

0

CS (LO)

1

0

0

0

(Rn)+Nn0

0

0

1

r

r

r

GE

0

0

0

1

LT

1

0

0

1

(Rn)–

0

1

0

r

r

r

NE

0

0

1

0

EQ

1

0

1

0

(Rn)+

0

1

1

r

r

r

PL

0

0

1

1

MI

1

0

1

1

(Rn)

1

0

0

r

r

r

NN

0

1

0

0

NR

1

1

0

0

(Rn+Nn)

1

0

1

r

r

r

EC

0

1

0

1

ES

1

1

0

1

–(Rn)

1

1

1

r

r

r

LC

0

1

1

0

LS

1

1

1

0

Absolute address

1

1

0

0

0

0

GT

0

1

1

1

LE

1

1

1

1

where “rrr” refers to an address register R0–R7 Timing: 4+jx oscillator clock cycles

Memory: 1+ea program words

MOTOROLA

INSTRUCTION SET DETAILS

A - 121

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Image 390
Motorola DSP56000, 24-Bit Digital Signal Processor manual Effective Addressing Mode M M M R R R Mnemonic C C C C