Motorola 24-Bit Digital Signal Processor Program Control Unit Programming Model, Program Counter

PROGRAMMING MODEL

PROGRAM CONTROL UNIT

23 16 150 23 16 150

*							*
		LOOP ADDRESS				LOOP COUNTER (LC)
		REGISTER (LA)
					0
23	16 15					23	16 15	8 7	0
*							*	MR	CCR
			PROGRAM					STATUS
		COUNTER (PC)					REGISTER (SR)
31			SSH	16 15				SSL	0

1

23 8 7 6 5 4 3 2 1 0

** SD * MC YD DE MB MA

OPERATING MODE REGISTER (OMR)

23 6 5 0

*

STACK POINTER (SP)

* READ AS ZERO, SHOULD BE WRITTEN WITH ZERO FOR FUTURE COMPATIBILITY

15

SYSTEM STACK

Figure 5-4 Program Control Unit Programming Model

ation, move the contents in accumulator A into the location in Y data memory pointed to by R4 and postdecrement R4. The third instruction, I3, is the same as I1, except the rounding operation is not performed.

5.4PROGRAMMING MODEL

The program control unit features LA and LC registers which support the DO loop instruc- tion and the standard program flow-control resources, such as a PC, complete SR, and

SS.With the exception of the PC, all registers are read/write to facilitate system debug- ging. Figure 5-4shows the program control unit programming model with the six registers and SS. The following paragraphs give a detailed description of each register.

5.4.1 Program Counter

This 16-bit register contains the address of the next location to be fetched from program memory space. The PC can point to instructions, data operands, or addresses of oper- ands. References to this register are always inherent and are implied by most instructions.

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