Motorola DSP56301 user manual Features, Host Interface HI32

Models: DSP56301

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Chapter 6

Host Interface (HI32)

The Host Interface (HI32) is a fast parallel host port up to 32 bits wide that can directly connect to the host bus. The HI32 supports a variety of standard buses and provides glueless connection with a number of industry-standard microcomputers, microprocessors, DSPs, and DMA controllers. The DSP56300 core controls host port pin functionality and polarity. The host bus can operate asynchronously to the DSP clock, so the HI32 registers are divided into two banks: the host-side bank, which is accessible to the external host, and the DSP-side bank, which is accessible to the DSP56300 core. Figure 6-1on page 6-5is a block diagram showing the HI32 registers. The HI32 supports three classes of interfaces:

νPeripheral Component Interconnect (PCI) bus, PCI Specification Revision 2.1. In PCI mode, the HI32 is a dedicated bidirectional initiator/target (master/slave) parallel port

with a 32-bit wide data path up to eight words deep. The HI32 can directly connect to the PCI bus.1

νUniversal bus interface. In Universal Bus (UB) modes, the HI32 is a dedicated bidirectional slave-only parallel port with a six word deep data path up to 24 bits wide. In this mode, the HI32 can directly connect to 8-bit data buses, 16-bit data buses (for example, ISA/EISA, Micro Channel), and 24-bit data buses (for example, DSP56300 core-based DSP Port A bus).

νGeneral-purpose I/O (GPIO) port. The DSP56300 core can program unused host port pins as GPIO pins. The HI32 provides up to 24 GPIO pins.

6.1Features

This section discusses the DSP56301 host interface features as they apply to the DSP56300 core interface, the host interface, PCI mode, and Universal Bus mode.

1.Two Motorola application notes cover HI32 operation in PCI mode: AN1780/D, DSP563xx HI32 As A PCI Agent, and AN1788/D, DSP563xx HI32 PCI Functions. These application notes, and accompanying code files, are available at: http://www.mot.com/SPS/DSP/Documentation/appnotes.html.

Host Interface (HI32)

6-1

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Motorola DSP56301 user manual Features, Host Interface HI32

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

One of the main features of the DSP56301 is its ability to handle complex computations at high speeds. With a maximum clock frequency of 66 MHz, it delivers fast performance, enabling it to process audio signals in real time. The chip is built on a 24-bit architecture, which allows for high-resolution audio processing. This is particularly beneficial in applications such as telecommunications, consumer audio devices, and professional audio equipment, where precision is paramount.

The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.