Motorola DSP56301 user manual Aarv

Models: DSP56301

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;

;

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;If MD:MC:MB:MA=0100, then it loads the program RAM from a SPI

;compatible Serial EPROM connected to the SCI interface as in the scheme

;below:

;

 

 

;

 

 

; ___________

__________

;

DSP56301

SEEPROM

;

;SCI(SCLK)-----------------------SCK

;

;SCI(TXD)-----------------------SIN

;

;SCI(RXD)-----------------------SOUT

;

;

;

__

;AA1 -----------------------CS

;

 

 

 

 

 

; ___________

 

 

 

__________

 

;

 

 

 

 

 

 

 

; The SEEPROM is selected

by

the

Address

Attribute Pin AA1.

;

 

 

 

 

 

 

 

; The SCI-SEEPROM bootstrap

code expects first to receive 3 bytes

; specifying

the number

of program

words,

afterwards

3 bytes

; specifying

the address

to start

loading

the program

words and

; then 3 bytes for each program

word to be loaded. The number of

; words, the starting address

and the program words are received

;least significant byte first followed by the mid and then by the most

;significant byte.

;

 

 

 

 

;

 

 

 

 

; The program words will be condensed into 24-bit words

and

; stored in contiguous PRAM

memory

locations starting

at

the

; specified starting address.

After

the program words

are

read,

;program execution starts from the same address where loading

;started.

;

;The SCI is configured to work in Mode 0 (8-bit Synchronous), Negative

;Clock Polarity, MSB First Shift Direction. The clock source is

;internal and the SCI frequency is programmed to 1/400 of the chip

;operating frequency

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

BOOT

equ

$D00000

; this is the location in P memory

 

 

 

; on the external memory bus

 

 

 

; where the external byte-wide

 

 

 

; EPROM would be located

AARV

equ

$D00409

; AAR1 selects the EPROM as CE~

 

 

 

; mapped as P from $D00000 to

 

 

 

; $DFFFFF, active low

M_BAAP

EQU

2

; Address Attribute Pin Polarity

M_SSR

EQU

$FFFF93

; SCI Status Register

M_STXL

EQU

$FFFF95

; SCI Transmit Data Register (low)

M_SRXL

EQU

$FFFF98

; SCI Receive Data Register (low)

M_SCCR

EQU

$FFFF9B

; SCI Clock Control Register

M_SCR

EQU

$FFFF9C

; SCI Control Register

 

 

 

 

A-6

DSP56301 User’s Manual

Page 302
Image 302
Motorola DSP56301 user manual Aarv

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

One of the main features of the DSP56301 is its ability to handle complex computations at high speeds. With a maximum clock frequency of 66 MHz, it delivers fast performance, enabling it to process audio signals in real time. The chip is built on a 24-bit architecture, which allows for high-resolution audio processing. This is particularly beneficial in applications such as telecommunications, consumer audio devices, and professional audio equipment, where precision is paramount.

The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.