Motorola DSP56301 user manual Hserr, Hirq, Hstop, Hwr, Hidsel, Hframe, Hclk

Host Interface (HI32)

Table 2-10.Host Interface (Continued)

Signal Name				Type	State During	Signal Description
					Reset
				Output, open	Tri-stated	Host System Error—When the HI32 is programmed to interface
HSERR
				drain		with a PCI bus and the HI function is selected, this is the Host
						System Error signal.
				Output, open		Host Interrupt Request—When HI32 is programmed to interface
HIRQ
				drain		with a universal non-PCI bus and the HI function is selected, this
						signal is Host Interrupt Request output.
						Port B —When the HI32 is configured as GPIO through the DCTR,
						this signal is internally disconnected.
				Input/	Tri-stated	Host Stop—When the HI32 is programmed to interface with a PCI
HSTOP
				Output		bus and the HI function is selected, this is the Host Stop signal.
		/HRW		Input		Host Write/Host Read-Write—When HI32 is programmed to
HWR
						interface with a universal non-PCI bus and the HI function is
						selected, this signal is Host Write/Host Read-Write Schmitt-trigger
						input.
						Port B —When the HI32 is configured as GPIO through the DCTR,
						this signal is internally disconnected.
HIDSEL				Input	Input	Host Initialization Device Select—When the HI32 is programmed
						to interface with a PCI bus and the HI function is selected, this is the
						Host Initialization Device Select signal.
	/			Input		Host Read/Host Data Strobe—When HI32 is programmed to
HRD			HDS
						interface with a universal non-PCI bus and the HI function is
						selected, this signal is Host Data Read/Host Data Strobe
						Schmitt-trigger input.
						Port B —When the HI32 is configured as GPIO through the DCTR,
						this signal is internally disconnected.
				Input/	Tri-stated	Host Frame—When the HI32 is programmed to interface with a PCI
HFRAME
				Output		bus and the HI function is selected, this is the Host cycle Frame
						signal.
						Non-PCI bus— When HI32 is programmed to interface with a
						universal non-PCI bus and the HI function is selected, this signal
						must be connected to a pull-up resistor or directly to VCC.
						Port B —When the HI32 is configured as GPIO through the DCTR,
						this signal is internally disconnected.
HCLK				Input	Input	Host Clock—When the HI32 is programmed to interface with a PCI
						bus and the HI function is selected, this is the Host Bus Clock input.
						Non-PCI bus— When the HI32 is programmed to interface with a
						universal non-PCI bus and the HI function is selected, this signal
						must be connected to a pull-up resistor or directly to VCC.
						Port B —When the HI32 is configured as GPIO through the DCTR,
						this signal is internally disconnected.

Signals/Connections 2-13