Motorola DSP56301 Essi Control Register a CRA Bit Definitions, Select SC1, Word Length Control

Models: DSP56301

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ESSI Programming Model

Table 7-3.ESSI Control Register A (CRA) Bit Definitions

Bit Number

Bit Name

Reset Value

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23

 

0

Reserved. Write to 0 for future compatibility.

 

22

SSC1

0

Select SC1

 

 

 

 

 

 

 

Controls the functionality of the SC1 signal. If SSC1 is set, the ESSI is

 

 

 

configured in Synchronous mode (the CRB synchronous/asynchronous bit

 

 

 

(SYN) is set), and transmitter 2 is disabled (transmit enable (TE2) = 0), then

 

 

 

the SC1 signal acts as the transmitter 0 driver-enabled signal while the SC1

 

 

 

signal is configured as output (SCD1 = 1). This configuration enables an

 

 

 

external buffer for the transmitter 0 output. If SSC1 is cleared, the ESSI is

 

 

 

configured in Synchronous mode (SYN = 1), and transmitter 2 is disabled

 

 

 

(TE2 = 0), then the SC1 acts as the serial I/O flag while the SC1 signal is

 

 

 

configured as output (SCD1 = 1).

 

 

 

 

 

 

 

 

21–19

WL[2–0]

0

Word Length Control

 

 

 

 

 

Select the length of the data words transferred via the ESSI. Word lengths of

 

 

 

8-, 12-, 16-, 24-, or 32-bits can be selected. The ESSI data path

 

 

 

programming model in Figure 7-12and Figure 7-13shows additional

 

 

 

information on how to select different lengths for data words. The ESSI data

 

 

 

registers are 24 bits long. The ESSI transmits 32-bit words in one of two

 

 

 

ways:

 

 

 

 

 

 

 

 

ν by duplicating the last bit 8 times when WL[2–0] = 100

 

 

 

ν by duplicating the first bit 8 times when WL[2–0] = 101.

 

 

 

Note:

When WL[2–0] = 100, the ESSI is designed to duplicate the last bit

 

 

 

 

of the 24-bit transmission eight times to fill the 32-bit shifter.

 

 

 

 

Instead, after the 24-bit word is shifted correctly, eight zeros (0s)

 

 

 

 

are shifted.

 

 

 

 

 

 

 

 

 

 

 

 

 

ESSI Word Length Selection

 

 

 

 

 

 

 

 

 

 

 

WL2

WL1

 

WL0

Number of Bits/Word

 

 

 

 

 

 

 

 

 

 

 

 

0

 

0

 

0

8

 

 

 

 

 

 

 

 

 

 

 

 

0

 

0

 

1

12

 

 

 

 

 

 

 

 

 

 

 

 

0

 

1

 

0

16

 

 

 

 

 

 

 

 

 

 

 

 

0

 

1

 

1

24

 

 

 

 

 

 

 

 

 

 

 

 

1

 

0

 

0

32

 

 

 

 

 

 

 

 

(valid data in the first 24

 

 

 

 

 

 

 

 

bits)

 

 

 

 

 

 

 

 

 

 

 

 

1

 

0

 

1

32

 

 

 

 

 

 

 

 

(valid data in the last 24

 

 

 

 

 

 

 

 

bits)

 

 

 

 

 

 

 

 

 

 

 

 

1

 

1

 

0

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

1

 

1

 

1

Reserved

 

 

 

 

 

 

 

 

 

 

 

Note:

When the ESSI transmits data in On-Demand mode (that is, MOD =

 

 

 

 

1 in the CRB and DC[4–0]=00000 in the CRA) with WL[2–0] = 100,

 

 

 

 

the transmission does not work properly. To ensure correct

 

 

 

 

operation, do not use On-Demand mode with the WL[2–0] = 100

 

 

 

 

32-bit word length mode.

 

 

 

 

 

 

 

 

 

 

 

Enhanced Synchronous Serial Interface (ESSI)

7-15

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Motorola DSP56301 Essi Control Register a CRA Bit Definitions, Select SC1, Word Length Control, Essi Word Length Selection

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

One of the main features of the DSP56301 is its ability to handle complex computations at high speeds. With a maximum clock frequency of 66 MHz, it delivers fast performance, enabling it to process audio signals in real time. The chip is built on a 24-bit architecture, which allows for high-resolution audio processing. This is particularly beneficial in applications such as telecommunications, consumer audio devices, and professional audio equipment, where precision is paramount.

The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.