Index-3

Debug mode entering 2-29external indication 2-29

Debug support 1-5

Detected Parity Error (DPE) bit 6-65Device/Vendor ID Configuration Register

(CDID/CVID) 6-64

DEVSEL Timing (DST[1–0]) bits 6-65Direct Memory Access (DMA)

ISA/EISA bus 6-15ISA/EISA bus enable 6-54Request Source bits 4-29techniques 6-22transfers 5-2,5-4triggered by timer 9-25

Direction (DIR) bit 9-30Division Factor (DF) bits 4-21DMA Address Mode (DAM) bit 4-34DMA Channel Enable (DE) bit 4-29DMA Channel Priority (DPR) bit 4-31

DMA Continuous Mode Enable (DCON) bit 4-32DMA Control Registers (DCRs) 4-29

bit definitions 4-29

DMA Address Mode (DAM) 4-34

DMA Channel Enable (DE) 4-29DMA Channel Priority (DPR) 4-31

DMA Continuous Mode Enable (DCON) 4-32DMA Destination Space (DDS) 4-34

DMA Interrupt Enable (DIE) 4-30

DMA Request Source (DRS) 4-33DMA Source Space (DSS) 4-34

DMA Three-Dimensional Mode (D3D) 4-33DMA Transfer Mode (DTM) 4-30programming sheet B-21

DMA Destination Space (DDS) bit 4-34DMA Enable (DMAE) bit 6-54

DMA Enable (ISA/EISA) bit 6-54DMA Interrupt Enable (DIE) bit 4-30DMA Request Source (DRS) bit 4-33 DMA see Direct Memory Access DMA Source Space (DSS) bit 4-34

DMA Three-Dimensional Mode (D3D) bit 4-33DMA Transfer Mode (DTM) bit 4-30

DO FOREVER (FV) Flag bit 4-8DO loop 1-4,1-8

Do Loop Flag (LF) bit 4-8document conventions 1-2

Double-Precision Multiply Mode (DM) bit 4-9

DRAM controller 1-5

DRAM Control Register (DCR) 4-22,4-24Bit Definitions 4-25

Bus Column In-Page Wait State (BCW) 4-26Bus DRAM Page Size (BPS) 4-26

Bus Mastership Enable (BME) 4-25

Bus Page Logic Enable (BPLE) 4-26Bus Refresh Enable (BREN) 4-25Bus Refresh Prescaler (BRP) 4-25Bus Refresh Rate (BRF) 4-25

Bus Row Out-of-Page Wait States (BRW) 4-26Bus Software Triggered Reset (BSTR) 4-25programming sheet B-19

DSP Control Register (DCTR) 6-12

Host Command Interrupt Enable (HCIE) 6-26Host Data Strobe Mode (HDSM) 6-25

Host DMA Request Polarity (HDRP) 6-24Host Flags 5–3 (HF[5–3]) 6-26

Host Interrupt A (HINT) 6-25

Host Interrupt Request Drive Control (HIRD) 6-24Host Interrupt Request Handshake Mode

(HIRH) 6-24

Host Read/Write Polarity (HRWP) 6-25Host Reset Polarity (HRSP) 6-24

Host Transfer Acknowledge Polarity (HTAP) 6-25Slave Receive Interrupt Enable (SRIE) 6-26Slave Transmit Interrupt Enable (STIE) 6-26

DSP Host Port GPIO Data Register (DATH) 6-43DSP Master Transmit Data Register (DTXM) 6-42DSP PCI Address Register (DPAR)

DSP PCI Transaction Address (Low) (AR[15–0]) 6-34

PCI Bus Command (C[3–0]) 6-34

PCI Byte Enables (BE[3–0] ) 6-33

DSP PCI Master Control Register (DPMC)

Data Transfer Format Control (FC[1–0]) 6-31DSP PCI Transaction Address (High)

(AR[31–16]) 6-32

PCI Data Burst Length (BL[5–0]) 6-32DSP PCI Port Control Register (DPCR)

Clear Transmiter (CLRT) 6-29HSERR Force (SERF) 6-28Insert Address Enable (IAE) 6-27

Master Access Counter Enable (MACE) 6-28Master Address Interrupt Enable (MAIE) 6-30Master Receive Interrupt Enable (MRIE) 6-30Master Transfer Terminate (MTT) 6-28Master Transmit Interrupt Enable (MTIE) 6-30Master Wait State Disable (MWSD) 6-28Parity Error Interrupt Enable (PEIE) 6-29Receive Buffer Lock Enable (RBLE) 6-27Transaction Abort Interrupt Enable (TAIE) 6-29Transaction Termination Interrupt Enable

(TTIE) 6-29

Transfer Complete Interrupt Enable (TCIE) 6-29DSP PCI Status Register (DPSR)

Master Data Transferred (MDT) 6-39

PCI Address Parity Error (APER) 6-40PCI Data Parity Error (DPER) 6-40

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

One of the main features of the DSP56301 is its ability to handle complex computations at high speeds. With a maximum clock frequency of 66 MHz, it delivers fast performance, enabling it to process audio signals in real time. The chip is built on a 24-bit architecture, which allows for high-resolution audio processing. This is particularly beneficial in applications such as telecommunications, consumer audio devices, and professional audio equipment, where precision is paramount.

The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.

Motorola DSP56301 user manual Index-3

Models: DSP56301

Index-3

DSP56301 specifications