Motorola DSP56301 SCI Clock Control Register Sccr Address X$FFFF9B Read/Write, Clock Out Divider

Programming Sheets

Application:	Date:
	Programmer:

Sheet 2 of 2

SCI

TCM	RCM	TX Clock	RX Clock	SCLK Pin		Mode
0	0	Internal	Internal	Output	Synchronous/Asynchronous
0	1	Internal	External	Input	Asynchronous only
1	0	External	Internal	Input	Asynchronous only
1	1	External	External	Input	Synchronous/Asynchronous

Transmitter Clock Mode/Source		Receiver Clock Mode/Source
0	= Internal clock for Transmitter	0	= Internal clock for Receiver
1	= External clock from SCLK	1	= External clock from SCLK

Clock Divider Bits (CD11–CD0)

CD11–CD0	I cyc Rate
$000	Icyc/1
$001	Icyc/2
$002	Icyc/3
•	•
•	•
•	•
$FFE	Icyc/4095
$FFF	Icyc/4096

		Clock Out Divider
	0		= Divide clock by 16 before feed to SCLK
	1		= Feed clock to directly to SCLK
SCI Clock Prescaler
0 = ÷1			1 = ÷ 8

23	15		14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
*0		TCM	RCM	SCP	COD	CD11	CD10	CD9	CD8	CD7	CD6	CD5	CD4	CD3	CD2	CD1	CD0
SCI Clock Control Register (SCCR)										Address X:$FFFF9B Read/Write

Reset = $000000

*= Reserved, Program as 0

Figure B-24.SCI Clock Control Registers (SCCR)

B-36 DSP56301 User’s Manual