Motorola DSP56301 user manual Can be stopped

;correspondingly drive the 24-bit data mapped into the 32-bit PCI bus word.

; Note that for the synchronization purposes, the DSP-to-PCI clock ratio

;should be more than 5/3.

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;If MD:MC:MB:MA=x101, then it loads the program RAM from the Host

;Interface programmed to operate in the Universal Bus mode supporting

;ISA (slave) glue less connection.

;
; Using Self-Configuration	mode, the base	address	in the CBMA is initially
; written with $2f, which	corresponds to	an ISA	HTXR address of $2fe

;(Serial Port 2 Modem Status read only register).

;The HI32 bootstrap code expects to read 32 consecutive times the "magic

;number" $0037. Subsequently the bootstrap code expects to read a 16-bit word

;that is the designated ISA Port Address; this address is written into the

;CBMA. The HOST Processor must poll for the Host Interface to be reconfigured.

;This must be done by reading the HSTR and verifying that the value $0013 is

;read. From this moment the HOST Processor can start writing data to the

;Host Interface.

;
; The	HI32 bootstrap code		expects first			to read	a 24-bit word (see
; Note	below)	specifying	the	number	of	program	words,	then a
; 24-bit word		specifying	the	address	to start		loading	the program

;words, and then 24-bit word for each program word to be loaded.

; The	program words will be stored			in contiguous	PRAM memory
; locations		beginning at the	specified	starting address.		After
; the	program	words are read,	program execution starts		from	the same

;address where loading started.

;	The Host Interface	bootstrap load program	can be stopped	by setting	the
;	Host Flag 0 (HF0)	in the HCTR register.	This will start	execution	of the

;loaded program from the specified starting address.

;	Note:	This ISA connection implies 16-bit data width access only and
;	that	the number of transferred 16-bit wide words must be

;even.

; The 24-bit words must be packed into 16-bit ISA words and then sent

;by the HOST Processor in the following sequence:

;	M0	L0
;	L1	H0
;	H1	M1
;

; The boot program will convert every three 16-bit wide host words to two

;24-bit wide 56301 opcodes in the following format:

;	H0		M0	L0
;	H1		M1	L1
;
; The Host		Processor must program the Host Interface to operate in the

;zero fill mode (HTF1-HTF0 = 01 in HCTR).

;Sugested 56301 to ISA connection:

;

A-4 DSP56301 User’s Manual