Receiver Enable, Woms, Wired-OR Mode Select

SCI Programming Model

Table 8-2.SCI Control Register (SCR) Bit Definitions (Continued)

Bit	Bit Name	Reset	Description
Number	Bit Name	Value	Description
Number		Value


9	TE	0	Transmitter Enable
			When TE is set, the transmitter is enabled. When TE is cleared, the transmitter
			completes transmission of data in the SCI transmit data shift register, and then the
			serial output is forced high (that is, idle). Data present in the SCI transmit data register
			(STX) is not transmitted. STX can be written and TDRE cleared, but the data is not
			transferred into the shift register. TE does not inhibit TDRE or transmit interrupts. Either
			a hardware RESET signal or a software RESET instruction clears TE.
			Setting TE causes the transmitter to send a preamble of 10 or 11 consecutive ones
			(depending on WDS), giving you a convenient way to ensure that the line goes idle
			before a new message starts. To force this separation of messages by the minimum
			idle line time, we recommend the following sequence:
			1. Write the last byte of the first message to STX.
			2. Wait for TDRE to go high, indicating the last byte has been transferred to the
			transmit shift register.
			3. Clear TE and set TE to queue an idle line preamble to follow immediately the
			transmission of the last character of the message (including the stop bit).
			4. Write the first byte of the second message to STX.
			In this sequence, if the first byte of the second message is not transferred to STX prior
			to the finish of the preamble transmission, the transmit data line remains idle until STX
			is finally written.

8	RE	0	Receiver Enable
			When RE is set, the receiver is enabled. When RE is cleared, the receiver is disabled,
			and data transfer from the receive shift register to the receive data register (SRX) is
			inhibited. If RE is cleared while a character is being received, the reception of the
			character completes before the receiver is disabled. RE does not inhibit RDRF or
			receive interrupts. Either a hardware RESET signal or a software RESET instruction
			clears RE.

7	WOMS	0	Wired-OR Mode Select
			When WOMS is set, the SCI TXD driver is programmed to function as an open-drain
			output and can be wired together with other TXD signals in an appropriate bus
			configuration, such as a master-slave multidrop configuration. An external pullup
			resistor is required on the bus. When WOMS is cleared, the TXD signal uses an active
			internal pullup. Either a hardware RESET signal or a software RESET instruction
			clears WOMS.

8-14	DSP56301 User’s Manual

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

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The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.

Motorola DSP56301 user manual Receiver Enable, Woms, Wired-OR Mode Select

Models: DSP56301

4. Write the first byte of the second message to STX.

Receiver Enable

WOMS

Wired-OR Mode Select

DSP56301 specifications