Motorola DSP56301 user manual Hdben

;	HA[10]	<-	SBHE_	; selects HI32 (base address 10011111)
;	HA[9]	<-	SA[0]	; selects HI32 (base address 10011111)
;	HA[8:3]	<-	SA[9:4]	; selects HI32 (base address 10011111)
;	HA[2:0] <-		SA[3:1]	; selects HTXR registers
;	HD[15:0] - SD[15:0]			; Data bus
;	HD[23:16] - Not connected			; High Data Bus - Should be pulled up or down
;	HDBEN_	-> OE_		; Output enable of transcievers
;	HDBDR	-> DIR		; Direction of transcievers
;	HSAK_	-> IO16_		; 16 bit data word
;	HBS_	<- Vcc		; Bus Strobe disabled
;	HAEN	<- AEN		; DMA cycle enable
;	HTA	-> CHRDY		; Channel ready
;	HWR_	<- IOWC_		; IO/DMA write strobe
;	HRD_	<- IORC_		; IO/DMA read strobe
;	HRST	<- inverted RSTDRV		; invert ISA reset
;

;

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;	If MD:MC:MB:MA=x110,	then it loads the program	RAM	from	the Host
;	Interface programmed	to operate in the Universal	Bus	(UB)	mode, in

;double-strobe pin configuration.

; The HI32 bootstrap			code expects		first		to receive	3 bytes specifying		the
; number	of program		words,	then	3 bytes specifying the address to
; start	loading	the program		words		and then 3 bytes for each program				word
; to be loaded.		The number of words,				the starting		address	and the program
; words	are received		least significant				byte first	followed	by the mid and

;then by the most significant byte.

; The program words will			be condensed	into 24-bit words and stored in
; contiguous	PRAM	memory	locations starting at the specified starting
; address.	After	reading	the program	words, program execution starts

;from the same address where loading started.

;	The Host Interface	bootstrap	load program may be stopped by setting	the
;	Host Flag 0 (HF0)	in HCTR	register. This will start execution of	the

;loaded program from the specified starting address.

;The user must externally decode the port address with active low logic and

;connect the select line to HAEN; all the address lines shall be pulled down

;except for HA3, HA2 and HA1 that select the HOST Interface registers.

;

;When booting through the Host Interface it is recommended that the Host

;boot program verify that the Host Interface is operational by

;reading the status register (HSTR) and confirm that TRDY=1.

;
; When	booting through		the	Host Interface,		it is recommended	that the
; HOST	Processor’s	boot	program verify		that the Host Interface		is
; ready	by reading	the status		register	(HSTR)	and confirm that	TRDY=1

;or HTRQ=1.

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;	If MD:MC:MB:MA=x111,	then it loads the program	RAM	from	the Host
;	Interface programmed	to operate in the Universal	Bus	(UB)	mode, in

;single-strobe pin configuration.

;Other than the single-strobe pin configuration, this mode is identical to

;the double-strobe pin configuration UB mode (MD:MC:MB:MA=x110).

DSP56301 User’s Manual A-5