Motorola DSP56301 user manual PLL and Clock Oscillator, Jtag TAP and OnCE Module

Models: DSP56301

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DSP56300 Core Functional Blocks

1.4.4PLL and Clock Oscillator

The clock generator in the DSP56300 core comprises two main blocks: the PLL, which performs clock input division, frequency multiplication, and skew elimination; and the clock generator, which performs low-power division and clock pulse generation. These features allow you to:

ν

ν

Change the low-power divide factor without losing the lock

Output a clock with skew elimination

The PLL allows the processor to operate at a high internal clock frequency using a low-frequency clock input, a feature that offers two immediate benefits:

νA lower-frequency clock input reduces the overall electromagnetic interference generated by a system.

νThe ability to oscillate at different frequencies reduces costs by eliminating the need to add additional oscillators to a system.

1.4.5JTAG TAP and OnCE Module

In the DSP56300 core is a dedicated user-accessible TAP that is fully compatible with the IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture. Problems with testing high-density circuit boards led to the development of this standard under the sponsorship of the Test Technology Committee of IEEE and the JTAG. The DSP56300 core implementation supports circuit-board test strategies based on this standard. The test logic includes a TAP with four dedicated signals, a 16-state controller, and three test data registers. A boundary scan register links all device signals into a single shift register. The test logic, implemented utilizing static logic design, is independent of the device system logic. For details on the JTAG port, consult the DSP56300 Family Manual.

The OnCE module interacts with the DSP56300 core and its peripherals nonintrusively so that you can examine registers, memory, or on-chip peripherals. This facilitates hardware and software development on the DSP56300 core processor. OnCE module functions are provided through the JTAG TAP signals. For details on the OnCE module, consult the DSP56300 Family Manual.

Overview

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Motorola DSP56301 user manual PLL and Clock Oscillator, Jtag TAP and OnCE Module