Motorola DSP56301 External Bus Disable, Stop Delay, Memory Switch Mode, Burst Mode Enable

Models: DSP56301

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Programming Sheets

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Sheet 2 of 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Central Processor

 

 

 

 

 

 

 

 

 

 

MOD(D:A)

Mode

Reset Vector

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Chip Operating Modes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0000

0

$C00000

Expanded mode

 

 

External Bus Disable

 

 

 

 

 

 

 

 

 

0001

1

$FF0000

Bootstrap from byte-wide memory

 

 

 

 

 

 

 

 

0010

2

$FF0000

Bootstrap through SCI

 

 

0 = enable 1 = disable

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0011

3

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0100

4

$FF0000

Bootstrap from ISA host

 

 

Stop Delay

 

 

 

 

 

 

 

 

 

 

 

 

0101

5

$FF0000

Bootstrap from HC11 host

 

 

0 = 128 K clocks 1 = 16 clocks

 

 

 

 

0110

6

$FF0000

Bootstrap from 8051 host

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0111

7

$FF0000

Bootstrap from MC68302 host

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Memory Switch Mode

 

 

 

 

 

 

 

 

1000

8

$008000

Expanded mode

 

 

 

 

 

1001

9

$FF0000

Bootstrap from byte-wide memory

 

 

0 = disable 1 = enable

 

 

 

 

 

 

 

 

 

 

 

 

 

1010

A

$FF0000

Bootstrap through SCI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1011

B

$FF0000

Bootstrap through SCI

 

 

Core-DMA Priority

 

 

 

 

 

 

 

1100

C

$FF0000

Bootstrap from ISA host

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1101

D

$FF0000

Bootstrap from HC11 host

 

 

CDP(1:0)

 

Core-DMA Priority

 

 

 

 

 

 

 

1110

E

$FF0000

Bootstrap from 8051 host

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

00

Core vs DMA Priority

 

 

 

 

 

 

 

1111

F

$FF0000

Bootstrap from MC68302 host

 

 

 

 

 

 

 

 

 

 

 

01

DMA accesses > Core

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

DMA accesses = Core

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

DMA accesses < Core

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Burst Mode Enable

0 = disable 1 = enable

TA Synchronize Select

0 = not selected 1 = selected

Bus Release Timing

0 = fast 1 = slow

Asynchronous Bus Arbitration Enable

0 = disable 1 = enable

Address Attribute Priority Disable

0 = enable 1 = disable

Address Trace Enable

0 = disable 1 = enable

Stack Extension XY Select

0 = X memory 1 = Y memory

Extended Stack Underflow Flag

0 = no 1 = underflow

Extended Stack Overflow Flag

0 = no 1 = overflow

Extended Stack Wrap Flag

0 = no wrap 1 = wrap (sticky bit)

Stack Extension Enable

0 = disable 1 = enable

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16

 

15

14

13

12

 

11

10

9

8

 

7

6

5

4

 

3

2

1

0

 

 

 

 

 

*0

*0

*0

SEN

 

WRP

EOV

EUN

XYS

 

ATE

APD

ABE

BRT

 

TAS

BE

CDP1

CDP0

 

MS

SD

*0

EBD

 

MD

MC

MB

MA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

System Stack Control

Extended Chip Operating

Chip Operating Mode

 

Status Register (SCS)

Mode Register (EOM)

Register (COM)

 

Operating Mode Register (OMR)

Read/Write

* = Reserved, Program as 0

 

 

Reset = $00030X; X = latched from levels on Mode pins

 

Figure B-2.Operating Mode Register (OMR)

 

 

 

 

 

B-14

DSP56301 User’s Manual

 

 

Page 326
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Motorola DSP56301 External Bus Disable, Stop Delay, Memory Switch Mode, Burst Mode Enable, TA Synchronize Select

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

One of the main features of the DSP56301 is its ability to handle complex computations at high speeds. With a maximum clock frequency of 66 MHz, it delivers fast performance, enabling it to process audio signals in real time. The chip is built on a 24-bit architecture, which allows for high-resolution audio processing. This is particularly beneficial in applications such as telecommunications, consumer audio devices, and professional audio equipment, where precision is paramount.

The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.