bset

#M_BAAP,x:M_AAR1

; change AA1 polarity, in order to set

 

 

; it high

; (5) ACTIVATE SERIAL INTERFACE and SYNCHRONIZE

movep

#3,x:M_STXL

; load TX byte (READ opcode, B0)

bset

#M_SCTE,x:M_SCR

; activate SCI’s TX

; (6) TRANSMIT OPCODE and ADDRESS

 

jclr

#M_TDRE,x:M_SSR,*

; wait until byte is TXed (opcode, B0)

movep

#0,x:M_STXL

; load TX byte (address, B1)

jclr

#M_RDRF,x:M_SSR,*

; wait until byte is RXed (garbage, B2-)

movep

x:M_SRXL,a2

; read garbage

jclr

#M_TDRE,x:M_SSR,*

; wait until byte is TXed (address, B1)

movep

a2,x:M_STXL

; keep transmitting to maitain clock (ECHO)

jclr

#M_RDRF,x:M_SSR,*

; wait until byte is RXed (garbage, B1-)

movep

x:M_SRXL,a2

; read garbage

;first read two words: program_length and target_address

do #6,_rd_2_ws

jclr

#M_TDRE,x:M_SSR,*

; wait until byte is TXed (ECHO)

movep

a2,x:M_STXL

; keep transmitting to maitain clock (ECHO)

jclr

#M_RDRF,x:M_SSR,*

; wait until byte is RXed (valid, B0.)

movep

x:M_SRXL,a2

; read ONE

byte

(valid, B0...)

asr

#8,a,a

; pack it

 

 

_rd_2_ws

 

 

 

 

move

a1,r0

; starting address for load

move

a1,r1

; save starting address

; Now read program words

 

 

 

do

a0,_rd_n_ws

; read N words

 

do

#3,_rd_bytes

; read 3 bytes

 

jclr

#M_TDRE,x:M_SSR,*

; wait until byte is TXed (ECHO)

movep

a2,x:M_STXL

; keep transmitting to maintain clock (ECHO)

; (7) READ ONE BYTE

 

 

 

jclr

#M_RDRF,x:M_SSR,*

; wait until byte is RXed (valid, B6...)

movep

x:M_SRXL,a2

; read ONE

byte

(valid, B6...)

; (8) PACK IT

 

 

 

 

asr

#8,a,a

; pack it

 

 

_rd_bytes

 

 

 

 

; (10) WRITE TO DESTINATION

 

 

 

move

a1,p:(r0)+

; Store 24-bit result in P mem

nop

 

; pipeline delay

 

nop

 

; pipeline delay

 

_rd_n_ws

 

 

; (13) DEASSERT CHIP SELECT

 

bclr

#M_BAAP,x:M_AAR1

; change AA1 polarity, in order to set

 

 

; it high

bra <FINISH

; Boot from EPROM done

DSP56301 User’s Manual

A-15

Page 311
Image 311
Motorola DSP56301 user manual Write to Destination

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

One of the main features of the DSP56301 is its ability to handle complex computations at high speeds. With a maximum clock frequency of 66 MHz, it delivers fast performance, enabling it to process audio signals in real time. The chip is built on a 24-bit architecture, which allows for high-resolution audio processing. This is particularly beneficial in applications such as telecommunications, consumer audio devices, and professional audio equipment, where precision is paramount.

The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.