ESSI1-X$FFFFA5 Read/Write | Motorola DSP56301 guide

Programming Sheets

Application:			Date:
			Programmer:

Sheet 1 of 3

ESSI

Select SC1 as Tx#0 drive enable

0 = SC1 functions as serial I/O flag

1 = functions as driver enable of Tx#0 external buffer

Word Length Control

WL2	WL1	WL0	Number of bits/word
0	0	0	8
0	0	1	12
0	1	0	16
0	1	1	24
1	0	0	32 (data in first 24 bits)
1	0	1	32 (data in last 24 bits)
1	1	0	Reserved
1	1	1	Reserved

Alignment Control

0= 16-bit data left aligned to bit 23

1= 16-bit data left aligned to bit 15

Frame Rate Divider Control DC4:0 = $00-$1F (1 to 32) Divide ratio for Normal mode

# of time slots for Network

The combination of PSR = 1 and PM[7:0] = $00 is forbidden

Prescaler Range 0 = divide by 8

1 = divide by 1

Prescale Modulus Select

PM[7–0] = $00-$FF (divide by 1 to 256)

23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
*0	SSC1	WL2	WL1	WL0	ALC	*0	DC4	DC3	DC2	DC1	DC0	PSR	*0	*0	*0	PM7	PM6	PM5	PM4	PM3	PM2	PM1	PM0

ESSI Control Register A (CRAx)									ESSI0—X:$FFFFB5 Read/Write
Reset = $000000									ESSI1—X:$FFFFA5 Read/Write

* = Reserved, Program as 0

Figure B-20.ESSI Control Register A (CRA)

B-32	DSP56301 User’s Manual

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

One of the main features of the DSP56301 is its ability to handle complex computations at high speeds. With a maximum clock frequency of 66 MHz, it delivers fast performance, enabling it to process audio signals in real time. The chip is built on a 24-bit architecture, which allows for high-resolution audio processing. This is particularly beneficial in applications such as telecommunications, consumer audio devices, and professional audio equipment, where precision is paramount.

The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.

Motorola DSP56301 user manual Essi Control Register a CRAx ESSI0-X$FFFFB5 Read/Write

Models: DSP56301

ESSI

WL2

WL1

WL0

Prescale Modulus Select

ESSI Control Register A (CRAx)

ESSI0—X:$FFFFB5 Read/Write

ESSI1—X:$FFFFA5 Read/Write

Figure B-20.ESSI Control Register A (CRA)

DSP56301 specifications