Motorola DSP56301 user manual Index-7

Models: DSP56301

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DSP PCI Transaction Address (High) (AR[31–16]) 6-32

PCI Data Burst Length (BL[5–0]) 6-32DSP PCI Port Control Register (DPCR) 6-26

Clear Transmitter (CLRT) 6-29HSERR Force (SERF) 6-28Insert Address Enable (IAE) 6-27

Master Access Counter Enable (MACE) 6-28Master Address Interrupt Enable (MAIE) 6-30Master Receive Interrupt Enable (MRIE) 6-30Master Transfer Terminate (MTT) 6-28Master Transmit Interrupt Enable (MTIE) 6-30Master Wait State Disable (MWSD) 6-28Parity Error Interrupt Enable (PEIE) 6-29Receive Buffer Lock Enable (RBLE) 6-27Transaction Abort Interrupt Enable (TAIE) 6-29Transaction Termination Interrupt Enable

(TTIE) 6-29

Transfer Complete Interrupt Enable (TCIE) 6-29DSP PCI Status Register (DPSR) 6-38

Master Data Transferred (MDT) 6-39

PCI Address Parity Error (APER) 6-40PCI Data Parity Error (DPER) 6-40

PCI Host Data Transfer Complete (HDTC) 6-39PCI Master Abort (MAB) 6-40

PCI Master Address Request (MARQ) 6-40

PCI Master Receive Data Request (MRRQ) 6-41PCI Master Transmit Data Request

(MTRQ) 6-41

PCI Master Wait States (MWS) 6-41PCI Target Abort (TAB) 6-40

PCI Target Disconnect (TDIS) 6-40PCI Target Retry (TRTY) 6-39

PCI Time Out Termination (TO) 6-39Remaining Data Count (RDC[5–0]) 6-38Remaining Data Count Qualifier (RDCQ) 6-38

DSP Receive Data FIFO (DRXR) 6-41

DSP Slave Transmit Data Register (DTXS) 6-7,6-42DSP Status Register (DSR) 6-35

HI32 Active (HACT) 6-35

Host Command Pending (HCP) 6-37Host Flags 2–0 (HF[2–0]) 6-36

Slave Receive Data Request (SRRQ) 6-36Slave Transmit Data Request (STRQ) 6-37

DSP56300 core access 6-22DSP-side

operating modes 6-12programming model 6-22

DSP-to-host data path 6-7

general-purpose flags 6-26enable/disable master access counter 6-28Enhanced Universal Bus mode 6-15examples of host-to-HI32 connections 6-18

exception handlers 6-6external data buffer 6-4GPIO 5-5,6-16GPIO mode 6-13,6-16HAD[31–0)pins 6-33handshake flags 6-44

Header Type/Latency Timer Configuration Register (CHTY/CLAT/CCLS) 6-68

Cache Line Size (CLS[7–0]) 6-69Header Type (HT[7–0]) 6-68Header Type (HT[7–0])) 6-68Latency Timer (High) (LT[7–0]) 6-69

HI32 Control Register (HCTR) 6-48

DMA Enable (DMAE) 6-54Host Flags 2–0 (HF[2–0]) 6-54Host Receive Data Transfer Format

(HRF[1–0]) 6-50

Host Semaphores (HS[2–0]) 6-49Host Transmit Data Transfer Format

(HTF[1–0]) 6-51

Receive Request Enable (RREQ) 6-55Slave Fetch Type (SFT) 6-52

Target Wait State Disable (TWSD) 6-49

Transmit Request Enable (TREQ) 6-56HI32 Mode (HM) bits 6-12HI32-to-memory data transfers 6-22HI32-to-PCI agent data transfers 6-45host command 6-6

Host Command Vector Register (HCVR) 6-59Host Command (HC) 6-61

Host Command Vector (HV[6–0]) 6-60Host Non-Maskable Interrupt (HNMI) 6-60

Host Data Direction Register (HDDR) programming sheet B-40

Host Data Register (HDR) programming sheet B-40

Host Interface Control Register (HCTR) 6-6Host Interface Status Register (HSTR) 6-57

Host Flags 5–3 (HF[5–3]) 6-57

Host Interrupt A (HINT) 6-57

Host Receive Data Request (HRRQ) 6-58Host Request (HREQ) 6-57

Host Transmit Data Request (HTRQ) 6-58Transmitter Ready (TRDY) 6-58

Host Master Receive Data Register (HRXM) 6-7,6-61

Host Port Pins 2-16host request 6-57

Host Slave Receive Data Register (HRXS) 6-61,6-62Host Transmit Data Register (HTXR) 6-62host-side

programming model 6-44

HTXR-DRXR and DTXM-HRXM data paths 6-6incomplete burst 6-38

Index-7

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Motorola DSP56301 user manual Index-7

DSP56301 specifications

The Motorola DSP56301 is a highly efficient digital signal processor, specifically engineered for real-time audio and speech processing applications. This DSP is part of Motorola's renowned DSP56300 family, which is recognized for its innovative features and outstanding performance in the realm of digital signal processing.

One of the main features of the DSP56301 is its ability to handle complex computations at high speeds. With a maximum clock frequency of 66 MHz, it delivers fast performance, enabling it to process audio signals in real time. The chip is built on a 24-bit architecture, which allows for high-resolution audio processing. This is particularly beneficial in applications such as telecommunications, consumer audio devices, and professional audio equipment, where precision is paramount.

The DSP56301 boasts a comprehensive instruction set that includes efficient mathematical operations, which are essential for digital filters and audio effects processing. One of the key innovations of this device is its dual data path architecture, which permits simultaneous processing of multiple data streams. This feature significantly enhances the device's throughput and responsiveness, making it suitable for demanding applications such as voice recognition and synthesis.

In terms of memory regions, the DSP56301 includes several on-chip memory categories, such as program memory, data memory, and a specialized memory for coefficients. The architecture's support for external memory expansion further increases its versatility, allowing designers to tailor systems to their specific requirements.

The DSP56301 implements advanced features such as a powerful on-chip hardware multiplier and accumulator, simplifying complex mathematical tasks and accelerating the execution of algorithms. Its flexible interrupt system enhances its capability to respond to time-sensitive operations, while the integrated serial ports facilitate efficient data communication with external devices.

Power consumption is also a vital characteristic of the DSP56301. It is designed with energy efficiency in mind, allowing for extended operation in battery-powered devices. The chip’s low power requirements are particularly advantageous in portable audio devices and other applications where energy conservation is crucial.

In conclusion, the Motorola DSP56301 is an exceptional digital signal processor that combines high processing power, flexibility, and efficiency. Its main features, advanced technologies, and robust architecture make it a top choice for developers seeking to create sophisticated audio and signal processing systems. With its enduring legacy in the industry, the DSP56301 continues to be relevant in a variety of modern applications, ensuring it remains a valuable tool for engineers and designers.