7MEMORY CONFIGURATION AND DATA PROCESS

7.2 Data transmission process

MELSEC-Q

The data is transmitted between the QD75 memories with steps (1) to (8) shown below.

The data transmission patterns numbered (1) to (8) on the right page correspond to the numbers (1) to (8) on the left page.

PLC CPU

(4) FROM command

(2) TO command

Buffer memory

Parameter area (a)

Parameter area (b)

Positioning data area

(No.1 to 600)

Block start data area

(No.7000 to 7004) Monitor data area Control data area

PLC CPU

(1) Power supply ON/memo area PLC CPU reset

Flash ROM

Parameter area (a)

Parameter area (b)

Positioning data area

(No.1 to 600)

Block start data area

(No.7000 to 7004)

QD75

Parameter area (a) Pr.1 to Pr.7 Pr.11 to Pr.24 Pr.43 to Pr.57

Parameter area (b) Pr.8 to Pr.10 Pr.25 to Pr.42

(3)PLC READY signal [Y0] OFFON

7 - 6

Page 270
Image 270
Mitsubishi Electronics QD75P Data transmission process, From command To command, Power supply ON/memo area PLC CPU reset