FastScan and FlexTest Reference Manual, V8.6_4
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Add Pin Constraints Command Dictionary
You can force constrained pins in test procedures to the opposite of the
constrained value, provided you put the pin back again to its constrained value by
the end of the procedure. The DRC process keeps track of which pins are forced to
the opposite of their constrained value in the test procedures.
FlexTest Specifics
The Add Pin Constraints command adds cycle behavior constraints to the
specified primary input.
For every primary input for which you do not specify a constraint by using the
Add Pin Constraints command, FlexTest automatically uses the default format
type NR, with a period of 1, and offset of 0. You can change the default format by
using the Setup Pin Constraints command.
You specify the test cycle width by using the Set Test Cycle command.
You can constrain a clock pin to its off-state to prevent its use as a capture clock
during the ATPG process. The constrained value must be the same as the clock
off-state or an error occurs. All clocks with a 0 off-state should have a return-zero
waveform. Likewise, all clocks with a 1 off-state should have a return-one
waveform. You cannot constrain an equivalent pin, with the exception of a NR
format pins.
FlexTest provides 11 constraint formats from which you choose the constant
value that you want to apply to an primary input. Further, these constraint formats
(waveform types) group into three waveform classes which apply to all automatic
test equipment:
Group 1 Non-return waveform; the pin value may change only once.
Includes the NR, C0, C1, CZ, and CX constraint formats. Group 1
waveforms require you to specify the period and offset. If not
specified for C0, C1, CX, and CZ, FlexTest assumes the period is
1 and the offset is 0.
Group 2 Return-zero waveform; the pin value may rise to a 1 and then
return to a 0. Includes the R0, SR0, and CR0 constraint formats.
Group 2 waveforms require you to specify the period,offset, and
pulse width.