Command Dictionary | Set Split Capture_cycle |
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Set Split Capture_cycle
Tools: FastScan
Scope: All modes
Usage
SET SPlit Capture_cycle ON OFf
Description
Enables or disables the simulation of level sensitive and leading edge state elements updating as a result of applied clocks.
The Set Split Capture_cycle enables or disables the simulation of level sensitive and leading edge state elements having updated as a result of the applied clocks. This simulation correctly calculates capture values for trailing edge and level sensitive state elements, even in the presence of C3 violations.
For more information, refer to “Setting Event Simulation (FastScan Only)” in the Scan and ATPG Process Guide.
This command is not available for RAM sequential simulations. Since clock sequential ATPG can test the same faults as RAM
Note sequential, this is not a real limitation.
Arguments
∙ON
A literal that specifies for the tool to set split capture_cycling ON.
∙OFf
A literal that specifies for the tool to set split capture_cycling OFF. This is the default behavior upon invocation of the tool.
Related Commands
Set Clock_off Simulation
FastScan and FlexTest Reference Manual, V8.6_4 |
