Mentor v8.6_4 manual Format for the design-level report is

Report Gates Command Dictionary

The format for the design-level report is:

instance_name cell_type

input_pin_name I (data) pin_pathname...

...

output_pin_name 0 (data) pin_pathname...

...

The format for the primitive-level report is:

instance_name (gate_ID#)			gate_type
input_pin_name	I	(data)	gate_ID#-pin_pathname...
...
output_pin_name	O	(data)	gate_ID#-pin_pathname...
...

The list associated with the input and output pin names indicate the pins to which they connect. For the primitive level, this also includes the gate index number of the connecting gate and only includes the pin pathname if one exists at that point. There is a limitation on reporting gates at the design level. If some circuitry inside the design cell is completely isolated from other circuitry, the command only reports the circuitry associated with the pin pathname.

You can also report the fan-in or fan-out cone of a specified gate with the Report Gates command. The endpoints of a cone are defined as the primary inputs, primary outputs, tied gates, rams, roms, flip-flops, and latches. All gates reported are at the primitive level.

You can change the output of the Report Gates command by using the Set Gate Report command.

You must flatten the netlist before issuing this command.

FastScan Output of the Report Gates Command

Most of the data reported by the Report Gates command is simulation data regarding the load_unload procedure immediately following the test_setup procedure. Statements like apply shift are broken out by surrounding ()s.

The last group of data is more specialized. Its contents depend on the capture clock being set with the -atpg switch. The starting state for this simulation results from simulating the events of the test setup procedure, followed by the load_unload procedure and its apply procedures (shift and shadow_control).

2-310 FastScan and FlexTest Reference Manual, V8.6_4