Command Dictionary | Save Patterns |
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If you use the -External or the -Begin and -End switches, thereby not saving all the internal patterns, the tool does not include test coverage and fault information in the ASCII pattern set.
-BInary — (FastScan only) A switch that writes the patterns in binary format.
The simulation and test format switch choices are as follows:
-LSIM — A switch that writes the patterns in the LSIM test vector format. This is a serial format so, you must also specify the -Serial switch; failure to do so results in the command using the -Parallel default which generates an error. You can simulate the LSIM format patterns by using the LSIM IC simulator.
-MGcwdb — A switch that writes the patterns in the Mentor Graphics Waveform Database format and creates a dofile.
The Mentor Graphics Waveform Database format contains scan patterns, in terms of events, and related timing information. You can use this format with Mentor Graphics tools like QuickSim II and QuickFault II.
The dofile that the -Mgcwdb switch creates is a QuickSim II dofile with the name <filename>.wdb.do. QuickSim II uses this dofile to load the appropriate waveform databases, define the input and output pins, run the simulator, compare the output waveforms with the expected output waveforms, and print out a report containing information about any differences.
-TSSIWgl — A switch that writes the patterns in the TSSI WGL format. The TSSI WGL format contains the waveform pattern information and any timing information from the timing file. You can use the TSSI WGL format patterns to generate test patterns in a variety of tester and simulator formats.
-TSSIBinwgl — A switch that writes the patterns in the TSSI Binary WGL format. The TSSI Binary WGL format contains the waveform pattern information and any timing information from the timing file.
-Verilog — A switch that writes the patterns in the Verilog format. The Verilog format contains pattern information and timing information from the timing file as a sequence of events. You can use the Verilog format patterns to interface to the Verilog-XL and Verifault simulators.
-VHdl — A switch that writes the patterns in the VHDL format.
