Analyze Bus | Command Dictionary |
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The available switch choices are as follows:
Exclusivity is the default behavior when you specify a gate_id# value without a corresponding switch.
∙-Drc_check
A switch that specifies for the tool to run the design rule check process again to categorize all buses and display the results. This is useful if you are changing constraints or the abort limit in an attempt to pass bus checks rather than abort.
∙-ALl
A switch that specifies for the tool to use the more extensive ATPG process to place all the fail and abort buses in a noncontentious state. The internal simulation data for this pattern is available in parallel pattern 0.
∙-AUto
A switch that automatically tries to locate the bus that cannot be made contention free. The analysis checks to see if any single bus cannot be made contention free. Each bus which cannot be made contention free (given the current abort limit and other restrictions) is reported to the user. Sometimes, each bus can be satisfied by itself, but some set of busses cannot all be satisfied. In this case,
Examples
The following example analyzes a bus that failed the regular bus contention checking:
set system mode atpg analyze bus 493
FastScan and FlexTest Reference Manual, V8.6_4 |