Command Dictionary | Set Simulation Mode |
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4.Only RAMs which are proven stable during the load/unload process will be allowed to hold values from one scan load to the next and are testable with ram_sequential patterns.
5.You cannot change the simulation mode from ram or clock sequential to combinational while there are any active patterns in the internal or external pattern sets.
6.If you change the simulation mode from combinational to ram sequential, the tool places all current atpg_untestable faults in the undetected_uncontrolled class where they are available for additional fault simulation and test generation.
7.You may use failure diagnosis for pattern sets which contain ram_sequential patterns.
8.If you use the Report Gate command with gate reporting set to parallel_pattern, then for the last set of 32 simulated patterns the tool displays the values for the 2 to 4 vectors of the ram_sequential patterns. If you selected a RAM gate, the Report Gate command also displays the internal RAM values.
9.If you use the Save Patterns command to save ram_sequential patterns, the tool places the argument “ram_sequential” on the pattern statement of the ASCII saved patterns.
10.The tool places ram_sequential patterns at the end of the internal pattern set.
11.The fault simulator can detect faults on RAM data lines during
ram_sequential patterns, but the test generator will not attempt to create a ram_sequential test for a data line fault. The tool assumes that it can always detect the faults with a
12.Even when you set the simulation mode to Ram_sequential, the test pattern generator always attempts to find a combinational test first. The test pattern generator only attempts a sequential test generation if all of the following are true:
FastScan and FlexTest Reference Manual, V8.6_4 |
