FastScan and FlexTest Reference Manual, V8.6_4
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Set Drc Handling Command Dictionary
If you do not specify the Error, Warning, Note, or Ignore option, then the
handling is either set to the previous handling or set to the Design Rules
Checker default.
NOVerbose
An optional literal that specifies for the tool to display the occurrence message
only once for the rules violation. This is the default.
Verbose
An optional literal that specifies for the tool to display the occurrence message
for each occurrence of the rules violation.
NOAtpg_analysis
An optional literal that specifies for the tool not to use test generation analysis
when performing rules checking. This is the default.
Atpg_analysis
An optional literal that specifies for the tool to use test generation analysis
when performing rules checking for clock rules (such as, C1, C3, C4, C5 and
C6), some D rules (such as D6 and D9), and some E rules (such as, E4, E5, E8,
E10, E11, and E12).
For clock rules C3 and C4, the Atpg_analysis option generates a check of the
clocks of the source and sink to see if they are gated off. To see if a path exists
from the Q output of the source to the sink, use the Set Sensitization Checking
command with checking turned on. It is recommended that you use the
Atpg_analysis option with the Set Sensitization Check On analysis to remove
the maximum number of false C3 and/or C4 violations.
-Mode A clk_name
A switch, a literal (A), and a string triplet that specifies the name of the clock
on which the tool performs further analysis to screen out false C3 and C4 clock
rules violations.
Note
If you want the tool to use the constraint values during the D6 rule
analysis, you must use the Atpg_analysis option.