Analyze Control Signals | Command Dictionary |
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Analyze Control Signals
Tools Supported: FastScan and FlexTest
Scope: All modes
Usage
ANAlyze COntrol Signals [-Report_only] [-Verbose]
Description
Identifies the primary inputs of control signals.
The Analyze Control Signals command analyzes each control signal (clocks, set, reset, write-control, read-control, etc.) of every sequential element (DFF, latch, RAM, ROM, etc.) and defines the elements’ primary input as a control signal. This analysis also considers pin constraints. The purpose of this analysis is to identify all the primary inputs in the circuit that need to be defined as a clock, read-control, or write-control.
Initially, the analysis only considers simple combinational gates. If the -Verbose option is specified, the tool issues messages indicating why certain control signals are not identified. At the end of the analysis, statistical information is displayed listing the number of control signals identified, their types, and additional information. By default, all identified control signals are identified and their primary inputs automatically defined as such (i.e., when a clock is identified, an implicit Add Clocks command is performed to define the primary input).
This command will perform the flattening process automatically, if executed prior to performing flattening.
Note
Arguments
∙-Report_only
An optional literal that specifies to identify control signals only (does not define the primary inputs as control signals). The invocation default is to automatically define the primary inputs as control signals.
