Save Patterns | Command Dictionary |
|
|
heading “Arguments”. When saving your patterns using the Save Patterns command, choose the format_switch that best suits your needs.
The tool by default pads excess load and unload values with Xs. You can override the default by specifying the
The module name created for the Verilog and VHDL testbenches, using enhanced AVI outputs via the
By default, when you are not using the
Arguments
∙filename
A required string that specifies the name of the file to which you want to write the test pattern set.
∙
An optional switch that specifies replacement of the contents of filename, if a file by that name already exists.
∙format_switch
An optional switch that specifies the format in which you want to save the test pattern set. The formats divide into three groups. The first group lists the general purpose formats. The second group lists the simulation and test formats. The third group lists the ASIC vendor formats.
The general purpose format switch choices are as follows:
FastScan and FlexTest Reference Manual, V8.6_4 |