DEFINITY ECS Release 8.2 Maintenance for R8.2csi
555-233-119 Issue 1
April 2000
Maintenance Objects
3-432DATA-CHL (Data Channel)
3
Data Channel Remote Maintenance Loop Around Test (#109)
This test verifies the integrity of the entire DATA-CHL (that is, the software, dual
port RAM, and hardware that comp ose it). It verifies that a connection c an be
established over the DATA-CHL and that the DATA-CHL can correctly send and
receive data over the connec tion (that is, over the TDM Bus). The test actually
involves two DATA-CHLs: the DATA-CHL that is the target of the test and a
second, arbitrary, unbusy DATA-CHL. A connection is set up by placing a c all out
from the arbitrary DATA-CHL and into the target DATA-CHL. Data is looped over
the connection in each d irection (that is, the target DATA-CHL is tested as both a
sender of data and a rec eiver of data). The test checks that the d ata received by
one DATA-CHL is the same as the data that was sent by the other DATA-CHL.
Because it establishes a c onnection between two Data Channels (DATA-CHLs)
across the TDM Bus, this test does more than just verify the integ rity of the target
DATA-CHL. It also verifies the integrity of the TDM Bus and Tone-Clock circuit
pack (by sending and receiving data).
If this test aborts or fails, it is impossib le to determine from this test alone whether
the defective DATA-CHL is the target DATA-CHL or the arbitrarily chosen
DATA-CHL, or if the problem lies with the TDM Bus, or Tone-Clock circuit pack.
The results of running Tests #107, #108, #110, and #111 on the DATA-CHL can
be used to determine whet her the target DATA-CHL is defective.
NOTE:
If an Error Code is encountered recommend ing that an CDR, System
Printer, Journal Print er, a nd/or P MS Link be busied out, restore each busied
out link to service accord ing to PRI-CDR/SEC-CDR (PRI-CDR Link),
FAIL The dual port RAM is not functioning correctly. Either the software cannot
correctly read from it and/or write to it or the hardware cannot correctly
read from it and/or write to it. Connections cannot be established over the
DATA-CHLs.
1. Execute the command again.
2. If the problem persists, replace the Processor circuit pac k. After the
Processor circuit pack has been replaced, its Time-of-Day clock must
be set using the set time command.
PASS The dual port RAM is functioning. Connections can be established over
the DATA-CHLs.
Table 3-186. TEST #108 Data Channel Dual Port RAM Test — Continued
Error
Code
Test
Result Description/Recommendation
Continued on next page