DEFINITY ECS Release 8.2 Maintenance for R8.2csi
555-233-119 Issue 1
April 2000
Maintenance Objects
3-956PR-MEM (RISC Memory)
3
Notes:
a. Refer to ‘‘PROCR (RISC Processor Circuit Pack TN798)’’ for a descriptio n
of these tests.
b. This test is run only via a reset system 4 command or a reset system 5
command.
c. Refer to ‘‘PR-MAINT (Maintenance Processor)’’ for a description of these
tests.
Order of Investigation
Short Test
Sequence
Long Test
Sequence D/ND1
1. D = Destructive; ND = Nondestruc tive
Processor Cache Test (#895)(a) X ND
Processor Cache Audit (#896)(a) X X ND
Processor Bus Time-out Exception Test (#82)(a) X X ND
Processor BOOTPROM Checksum Test (#897)(a) X X ND
Processor Write Buffer Test (#900)(a) X X ND
Memory Burst Read Test (#908) X X ND
Read All Memory Test (#85) X ND
Memory Parity Error Detection Test (#87) X X ND
Flash Memory Checksum Test (#86) X ND
Memory Functional Test (#332) (b) X D
MTP Outpulse Relay Test (#102) (c) X X ND
MTP External Modem Present Test (#230) (c) X X ND
MTP Analog Loop Around Test (#103) (c) X X ND
MTP Sanity Handshake Test (#106) (c) X X ND
MTP SAT Loop Around Test (#228) (c) X X ND
MTP Aux Loop Around Test (#229) (c) X X ND
MTP Reset Test (#101) (c) X D
MTP Dual Port Ram Test (#104) (c) X D
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