DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126 Issue 4
June 1999
Maintenance Object Repair Procedures
9-1026MEM-BD (32MB Memory Circuit Pack)
9
MEM-BD (32MB Memory Circuit
Pack)
The memory circuit packs contain the system software which is exec uted after it
is loaded from tape or d isk. The processor and the memory c ircuit packs for m
the most critical comp onent for all system operation.
The processor must be able to ac cess the memory for all system ac tivity or the
syste m will go i nto SPE-d own m ode . In SPE-d own m ode , fata l memo ry er rors
may show up as processor c ircuit pack errors.
Each m emor y cir cuit pac k has 32 Mb ytes of c apac ity. Th e SPE ca rrier (s) c onta in
four dedicated slots for Memory circuit packs. Depending on its size, the system
uses from two to four of these slots. Memory circui t packs must reside in
contiguous slots, starting Memory slot one.
Each Memory circuit pac k contains its own error detec tion and correction ( EDC)
circuit, parity che cker and burst read function.
The EDC circuit operates by chec king the contents of memor y both as memory
locations are accessed by the Processor and periodically by a built-in
"scrubbing" function. The scrub bing function c hecks for errors through the entire
Memory circuit pac k every 111 seconds. It flag s and corrects sing le-bit errors
automatically and flags ( but does not correc t) multiple bit errors. If the EDC
circuit fails, the Memory ci rcuit pack will not b e able to detect and correct single
bit errors or detect and flag multiple bit errors. I f a single or multiple bit error
occurs, the system may not c ontinue to operate correctly.
The Memory parity checker d etects bad parity over the Processor Bus when any
Bus Master writes memory. It also generates parity (for chec king by the
MO Name (in
Alarm Log) Alarm
Level Initial Command to Run1
1. UU is the cabinet number (always 1, not required). With simplex SPE, carrier designation is not
required. With duplicated SPEs, carrier a or b must be specified.
S
is the number of the circuit
pack slot (1 to 4 for Memory slots ). If the slot number is
not
specified, all Memory circuit p acks
in the specified carrier will be tested.
Full Name of MO
MEM-BD MAJOR2
2. After a spontaneous SPE interchange has occurred, the Alarm Log retains for three hours a
record of any MAJOR ON-BOARD alarm against an SPE component that took place before the
interchange. If a spontaneous interchange has occurred (as ind icated by STBY-SPE error type
103 or the display initcauses screen), and handshake is down, (check with status spe),
replace the alarmed circuit pack on the standb y SPE. If handshake is up, execute a test long
clear of the alarmed circuit pack and follow recommended p rocedures.
test memory UUCS l 32M Memory Circuit Pack
MEM-BD MINOR test memory UUCS s 32M Memory Circuit Pack
MEM-BD WARNING 32M Memory Circuit Pack